Altera Avalon Verification IP Suite User Manual Page 69

  • Download
  • Add to my manuals
  • Print
  • Page
    / 224
  • Table of contents
  • BOOKMARKS
  • Rated. / 5. Based on customer reviews
Page view 68
set_response_request()
void set_response_request(Request_t request)Prototype:
Verilog HDL: Request_t request
VHDL: Request_t request, bfm_id, req_if(bfm_id)
Arguments:
voidReturns:
Sets the transaction type to read or write in the response descriptor. The
enumeration type defines REQ_READ = 0 and REQ_WRITE = 1.
Description:
Verilog HDL, VHDLLanguage support:
set_response_timeout()
void set_response_timeout(int cycles)Prototype:
Verilog HDL: None
VHDL: bfm_id, req_if(bfm_id)
Arguments:
voidReturns:
Sets the number of cycles that may elapse before timing out.Description:
Verilog HDL, VHDLLanguage support:
set_write_response_id()
void set_write_respose_id(AvalonTransactionId_t id)Prototype:
Verilog HDL: AvalonTransactionId_t id
VHDL: AvalonTransactionId_t id, bfm_id, req_if(bfm_id)
Arguments:
voidReturns:
Sets the transaction ID on the avs_writeid pin.Description:
Verilog HDL, VHDLLanguage support:
Altera Corporation
Avalon-MM Slave BFM
Send Feedback
6-21
set_response_request()
Page view 68
1 2 ... 64 65 66 67 68 69 70 71 72 73 74 ... 223 224

Comments to this Manuals

No comments