Altera Avalon Verification IP Suite User Manual Page 22
- Page / 224
- Table of contents
- BOOKMARKS
- User Guide 1
- Contents 2
- Altera Corporation 10
- BFM Implementation 12
- VHDL SupportVerilog HDL 13
- Application Example of BFMs 14
- Testbench 15
- Clock Source BFM 16
- Clock_stop() 17
- Reset Source BFM 18
- Interrupt Source and Sink API 21
- Avalon-MM Master BFM 23
- Block Diagram 27
- Avalon-MM 28
- Master BFM 28
- Avalon-MM Master BFM API 31
- Avalon-MM Slave BFM 49
- Test Program 55
- Slave BFM 55
- Avalon-MM Slave BFM API 58
- Avalon-MM Monitor 73
- Avalon-ST Source BFM 113
- DescriptionSymbol 114
- DescriptionLegal 115
- Parameter 115
- Avalon-ST Source API 116
- Avalon-ST Sink BFM 127
- Application Program Interface 130
- Avalon-ST Monitor 137
- Parameters 138
- Coverage Group 141
- Transaction Monitoring 150
- Conduit BFM 156
- Conduit BFM API 157
- Tri-State Conduit BFM 160
- Tri-State Conduit BFM API 161
- External Memory BFM 170
- Using the External Memory BFM 171
- External Memory BFM API 174
- • Extended instructions 176
- Subscribe 191
- Send Feedback 191
- Verifying Avalon-ST DUT 204
- Setting up the Test 206
- ValueParameters 207
- Running the Simulation 208
- Observing the Results 209
- ValueParameter 212
- Using the VHDL BFMs 220
- Related Information 221
- Document Revision History 222
- How to Contact Altera 223
- Typographic Conventions 223
- MeaningVisual Cue 224
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