Altera Avalon Verification IP Suite User Manual download pdf (Page 107)

get_transaction_fifo_max()

int get_transaction_fifo_max()Prototype:

Verilog HDL: None

VHDL: transaction_fifo_max, bfm_id, req_if(bfm_id)

Arguments:

intReturns:

Gets the maximum transaction FIFO depth.Description:

Verilog HDL, VHDLLanguage support:

get_transaction_fifo_threshold()

int get_transaction_fifo_threshold()Prototype:

Verilog HDL: None

VHDL: transaction_fifo_threshold, bfm_id, req_if(bfm_id)

Arguments:

intReturns:

Gets the transaction FIFO threshold level.Description:

Verilog HDL, VHDLLanguage support:

get_write_response_queue_size()

int get_write_response_queue_size()Prototype:

Verilog HDL: None

VHDL: write_response_queue_size, bfm_id, req_if(bfm_id)

Arguments:

intReturns:

Queries the write response queue to determine number of response

descriptors currently stored in the BFM. This is the number of responses

the test program can immediately remove from the response queue for

further processing.

Description:

Verilog HDL, VHDLLanguage support:

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Altera Avalon Verification IP Suite User Manual Page 107