Altera Integer Arithmetic IP User Manual download pdf (Page 56)

• Provides an option to dynamically switch between add and subtract operation

• Supports optional asynchronous clear and clock enable input ports

• Supports systolic delay register mode

• Supports pre-adder with 8 pre-load coefficients per multiplier

• Supports pre-load constant to complement accumulator feedback

• Pre-adder, coefficient storage and systolic delay register features are added to maximize flexibility.

Pre-adder

With pre-adder, additions or subtractions are done prior to feeding the multiplier.

There are five pre-adder modes:

• Simple mode

• Coefficient mode

• Input mode

• Square mode

• Constant mode

Note: When pre-adder is used (pre-adder coefficient/input/square mode), all data inputs to the multiplier

must have the same clock setting.

Pre-adder Simple Mode

In this mode, both operands derive from the input ports and pre-adder is not used or bypassed. This is the

default mode.

Figure 6-2: Pre-adder Simple Mode

Mult0

result

Pre-adder Coefficient Mode

In this mode, one multiplier operand derives from the pre-adder, and the other operand derives from the

internal coefficient storage. The coefficient storage allows up to 8 preset constants. The coefficient

selection signals are coefsel[0..3].

The following settings are applied in this mode:

• The width of the dataa[] input (WIDTH_A) must be less than or equals to 25 bits

• The width of the datab[] input (WIDTH_B) must be less than or equals to 25 bits

• The width of the coefficient input must be less than or equals to 27 bits

This mode is expressed in the following equation.

UG-01063

2014.12.19

Pre-adder

6-3

ALTERA_MULT_ADD (Multiply-Adder)

Altera Corporation

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Altera Integer Arithmetic IP User Manual Page 56