Altera DE2-115 User Manual download pdf (Page 107)

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Figure 6-25 Man-Machine Interface of Audio Recorder and Player

Figure 6-26 shows the block diagram of the Audio Recorder and Player design. There are hardware

and software parts in the block diagram. The software part stores the Nios II program in SRAM.

The software part is built by Nios II IDE in C programming language. The hardware part is built by

SOPC Builder under Quartus II. The hardware part includes all the other blocks. The “AUDIO

Controller” is a user-defined SOPC component. It is designed to send audio data to the audio chip

or receive audio data from the audio chip.

The audio chip is programmed through I2C protocol which is implemented in C code. The I2C pins

from audio chip are connected to SOPC System Interconnect Fabric through PIO controllers. In this

example, the audio chip is configured in Master Mode. The audio interface is configured as I2S and

16-bit mode. 18.432MHz clock generated by the PLL is connected to the XTI/MCLK pin of the

audio chip through the AUDIO Controller.

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Altera DE2-115 User Manual Page 107