Altera DDR2 SDRAM Controller manuals

Altera : DDR2 SDRAM Controller User Manual (106 pages)

Brand: Altera | Category: Measuring instruments | Size: 1.60 MB |

101 Innovation Drive

San Jose, CA 95134

Software Version: 9.0

Document Date: March 2009

UG-DDRSDRAM-10.0

Contents

1. About This Compiler

Features

General Description

Note to Figure 1–1:

Note to Table 1–3:

Installation and Licensing

OpenCore Plus Evaluation

2. Getting Started

SOPC Builder Design Flow

Parameterize

Constraints

Add/Update Component

Create Your Top-Level Design

Edit the PLL

Program a Device

Figure 2–1. System Naming

Set Up Simulation

Generate

Simulate the Example Design

Notes to Table 2–2:

Notes to Table 2–3:

Notes to Table 2–4:

Compile the Example Design

Implement Your Design

Set Up Licensing

Control Logic

Datapath

Device-Level Description

Figure 3–3. Datapath Timing

Designing Your Own Controller

DQS Group Block Diagrams

Notes to Figure 3–4:

Notes to Figure 3–5:

Notes to Figure 3–6:

Notes to Figure 3–7:

PLL Configurations

Stratix II Device

Stratix Device

Cyclone II Device

Cyclone Device

DLL Configurations

Example Design

Notes to Table 3–5:

Interface Description

Figure 3–13. Writes

Interfaces & Signals

DDR SDRAM

Interface

Local Interface

[1] [3][2] [5][4]

[1] [2] [3] [4] [6][5]

User Refresh Control

200 clock cycles

Note to Table 3–7:

Parameters

Controller

Note to Table 3–15:

Controller Timings

Memory Timings

Board Timings

Project Settings

Manual Timings

Simulation Testing

Hardware Testing

(MT46V8M16-75Z)

A. Manual Timing Settings

Resynchronization

Resynchronization Registers

Notes to Figure A–2:

Notes to Figure A–3:

Notes to Figure A–4:

Notes to Table A–5:

Note to Figure A–5:

DQS Postamble

Postamble Logic

System Clock

Postamble

Examples

Board, Cyclone II Edition

D. Maximizing Performance

101

Adjust the PLL Phases

102

Assign Pins

102

Place the Fedback PLL

102

Update the PLL Phases

103

Additional Information

105

Typographic Conventions

106

Preliminary

106

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Altera DDR2 SDRAM Controller manuals

Altera : DDR2 SDRAM Controller User Manual (106 pages)

Table of contents

Altera devices