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RAM-Based Shift Register
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Altera RAM-Based Shift Register User Manual Page 6
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1–4
Chapter 1:
About this Megafunc
tion
General Description
RAM-Based Shift Register (ALTSH
IFT_TAPS) Megafunction User
Gu
ide
May 2013
Altera Corporation
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User Guide
1
Megafunction
1
1. About this Megafunction
3
Features
4
General Description
4
Notes for Figure 1–1
5
2. Getting Started
7
Notes for Table 2–1
10
Simulation
13
Quartus II Software Simulator
14
EDA Simulator
14
Design Files
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Configuration Settings
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■ Number of taps equals to 4
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■ 8-bit data width
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Conclusion
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3. Specifications
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VHDL Library-Use Declaration
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Chapter 3: Specifications 3–3
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3–4 Chapter 3: Specifications
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Additional Information
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Typographic Conventions
26
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