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Altera FIR Compiler User Manual Page 76
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Info–4
Additional Information
Typographic Conventions
FIR Compiler User Guide
© May 2011
Altera Corporation
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FIR Compiler
1
User Guide
1
UG-FIRCOMPILER 11.0
2
Contents
3
Additional Information
4
1. About the FIR Compiler
5
Delay Line
6
Coefficient
6
Multipliers
6
Adder Tree
6
Features
7
Release Information
8
Device Family Support
9
MegaCore Verification
10
Notes to Table 1–5:
11
Notes to Table 1–6:
11
Installation and Licensing
12
2. Getting Started
15
Figure 2–4. Set Up Simulation
18
Notes to Table 2–1
21
Simulate the Design
22
Simulating in MATLAB
23
3. Parameter Settings
25
Specifying the Coefficients
26
Note to Figure 3–6:
31
Analyzing the Coefficients
32
Bits Removed from MSB
34
Bits Removed from LSB
34
Note to Table 3–4:
36
Note to Table 3–5:
37
Note to Table 3–6:
38
Resource Estimates
40
Filter Design Tips
40
4. Functional Description
43
Coefficient Scaling
44
Symmetrical Serial
45
Structure Types
48
Serial Structures
49
Multibit Serial Structure
49
Interpolation and Decimation
50
Figure 4–8. Signal Decimation
51
Pipelining
54
Simulation Output
55
Avalon Streaming Interface
55
Data Source Data Sink
56
Packet Data Transfers
57
■ 00: No error
58
■ 01: Missing SOP
58
■ 10: Missing EOP
58
■ 11: Unexpected EOP
58
Timing Diagrams
59
Referenced Documents
68
Structures
69
Supported Device Structures
70
Compiling HardCopy Designs
71
How to Contact Altera
74
Typographic Conventions
74
Additional Information Info–3
75
Info–4 Additional Information
76
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