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Altera Embedded Systems Development Kit, Cyclone III Edit User Manual Page 43

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6–5 Development Board Version 1.0. Altera Corporation
Altera Embedded Systems Development Kit, Cyclone III Edition July 2010
About the Nios II 3C120 Microprocessor System with LCD Controller
Figure 6–2. Nios II 3C120 Microprocessor with LCD Controller
Following is a summary of the processor system:
CPU Platform
The CPU platform consists of
■ Nios II/f cpu core
■ JTAG Debug Port
■ 32KB Instruction Cache
■ 32KB Data Cache
Memory Interfaces
■ DDR2 SDRAM Controller
● Run time program and data memory
■ CFI Flash Controller
● Stores FPGA configuration data
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