Altera Cyclone V SoC User Manual download pdf (Page 33)

Chapter 5: Board Test System 5–15

The Power Monitor

November 2013 Altera Corporation Cyclone V SoC Development Kit

User Guide

1 Support for this tap is device and software version dependent.

■ Equalizer—Specifies the setting for the receiver equalizer.

■ DC gain—Specifies the DC portion of the receiver equalizer.

■ PRBS—Selects the transmit pattern and sets the receive error detection circuitry to

expect the same pattern for use in loopback testing.

The Power Monitor

The Power Monitor measures and reports current power information. To start the

application, click Power Monitor in the Board Test System application.

1 You can also run the Power Monitor as a stand-alone application. PowerMonitor.exe

resides in the <install

dir>\kits\cycloneVSX_5csxfc6df31_soc\examples\board_test_system directory.

In Windows, click Start > All Programs > Altera > Cyclone V SoC Development Kit

<version> > Power Monitor to start the application.

The Power Monitor communicates with the MAX V device on the board through the

JTAG bus. A power monitor circuit attached to the MAX V device allows you to

measure the power that the Cyclone V FPGA is consuming.

1 The Power Monitor measures power over an I

C bus with multiple masters. You

might see some glitches in the measurements if the HPS is booted. The GSRD and

other Linux images access the I

C bus periodically and cause inaccurate

measurements for a cycle or two. These should go away and likely return to an

accurate, steady state measurement for most designs.

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Altera Cyclone V SoC User Manual Page 33