Altera DE2-115 User's Guide Page 97

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SFSU - Embedded Systems Tutorial Nano- Electronics & Computing Research Lab
96
//=======================================================
// REG/WIRE declarations
//=======================================================
//=======================================================
// Structural coding
//=======================================================
endmodule
This step initiates all the ports selected on system builder.
Step 5: Open SOPC Builder Window and add the following components from library (detailed procedure
is explained in chapter no.3):
alt_pll
CPU
System id
SD RAM
Tri State Bridge Flash
Flash
SRAM
On chip Memory
SGDMA Controller
Timing Adapter
On Chip FIFO Memory
Timing Adapter
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