Altera Nios Development Board User Manual Page 52
- Page / 54
- Table of contents
- BOOKMARKS
- Nios Development Board 1
- MNL-N2DEVLBDCYC-1.2 2
- About this Manual 3
- How to Contact 4
- Typographic 4
- Conventions 4
- Visual Cue Meaning 5
- Contents 7
- Block Diagram 10
- Default Reference Design 10
- Development 11
- Components 11
- The Cyclone 12
- EP1C20 Device 12
- Flash Memory 13
- Connector 14
- CompactFlash 14
- SDRAM Device 16
- Dual SRAM 18
- Altera Corporation 1–11 19
- Board Components 19
- Expansion 21
- Prototype 21
- (PROTO2) 21
- 1–16 Altera Corporation 24
- Mictor Connector 24
- Serial Port 25
- Connectors 25
- Dual 7-Segment 26
- Push-Button 27
- Switches 27
- Individual LEDs 27
- Serial Flash 27
- 1–20 Altera Corporation 28
- Reset Distribution 29
- Starting Configuration 29
- Cyclone Configuration 29
- Configuration Data 30
- 1–24 Altera Corporation 32
- The Configuration-Status LEDs 33
- SW8 – CPU Reset 34
- SW9 – Force Safe 35
- SW10 – Power-On Reset 35
- Power-Supply 36
- Circuitry 36
- Clock Circuitry 36
- JTAG Connectors 37
- ° compared to J24 38
- Altera Corporation 1–31 39
- 1–32 Altera Corporation 40
- Appendix A. Shared Bus Table 41
- A–2 Altera Corporation 42
- December 2004 42
- Description 42
- Altera Corporation A–3 43
- A–4 Altera Corporation 44
- Appendix B. Restoring the 45
- Factory Configuration 45
- Reprogramming 46
- Configuration 46
- Controller 46
- Board via Ethernet 47
- Connecting the 48
- LCD Screen 48
- Obtaining an IP 48
- Static IP Address 49
- Point–to–Point Connections 50
- Browsing Your 51
- C–6 December 2004 52
- Browsing Your Board 52
- Altera Corporation Index–1 53
- Index–2 Altera Corporation 54
- December 2004 54
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