Altera Internal Memory (RAM and ROM) IP Core User Manual Page 3
- Page / 57
- Table of contents
- BOOKMARKS
- User Guide 1
- Contents 2
- Embedded Memory Features 4
- Using the Parameter Editor 7
- Related Information 10
- Memory Block Types 11
- Altera Corporation 12
- Send Feedback 12
- Read Operation 13
- Port Width Configurations 14
- Clocking Modes Description 16
- 2014.12.17 17
- UG-01068 17
- Byte Enable 18
- Asynchronous Clear 20
- Read Enable 20
- Read-During-Write 21
- Error Correction Code 25
- RAM:1-Port IP Core Parameters 31
- Design Example 47
- Option Value 48
- Simulating the Design 50
- Ports Name Ports 51
- Descriptions 51
- Document Revision History 56
- Date Version Changes 57
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